The invention relates generally to automatic test equipment and more particularly a high current and high accuracy linear amplifier for use with a semiconductor tester power supply to provide precise voltage and current levels to a high-speed device-under-test (DUT).
Semiconductor device manufacturing typically includes test processes at both the wafer and packaged-device levels. The testing is normally carried out by automatic test equipment ATE that simulates a variety of operating conditions to verify the functionality of each device. As is well known in the art, semiconductor devices generally require a source of power in order to function.
As the speeds of modem semiconductors increase, the dynamic current requirements necessary to operate the devices also increase. This is due to many variables, such as the reduction in logic level voltages, higher switching speeds, higher transistor counts, transistor technology, etc. As it stands, modem microprocessors may draw from a few hundred milli-amps in static conditions, to over two-hundred amps during dynamic conditions over the course of a few nanoseconds.
Unlike power supplies that are typically employed in, for example, a personal computer, power supplies for automatic test equipment applications generally must be accurate, fast, and programmable. Device manufacturers often test a semiconductor part to characterize extreme operating ranges, and desire high accuracy to enable proper xe2x80x9cbinningxe2x80x9d of the highest speed devices. Just a few millivolts of inaccuracy can result in a gigahertz speed device sorted in a lower speed bin. Because higher speed devices command significantly higher prices for manufacturers, power supply accuracy plays an important role in the overall test process.
Conventional DUT power supplies typically include a switching DC-DC converter to step-down a high voltage to a lower DUT operating voltage, and a linear amplifier to condition the output of the converter. Digital circuitry provides a digital control mechanism over the analog-based converter and linear amplifier circuitry. Because high accuracy is an important consideration for ATE applications, the linear amplifier portion of the DUT power supply plays a key role in test success.
Typical linear amplifiers employed in conventional ATE applications are often of the push-pull emitter or source follower configuration (output follows the emitter for BJT""s, or at the source for FET""s), similar to audio amplifiers. Biasing this type of amplifier configuration often entails substantial warmup to minimize distortion (at one extreme) or significant power dissipation to keep the amplifier xe2x80x9calways onxe2x80x9d. It would be desirable to minimize both distortion and power dissipation, yet maintain the output transistors in an xe2x80x9conxe2x80x9d state.
Moreover, during the testing of devices, semiconductor manufacturers often need to know how much current the DUT demands. Conventionally, this is carried out by a series resistor disposed in the output of the linear amplifier, and monitored by an instrumentation amplifier. As power supply currents increase, the value of the sense resistor must go down, and the power rating up. A large resistor capable of monitoring 100 amperes or more will typically be wire wound, introducing substantial inductance. Inductance tends to resist instantaneous changes in current. Thus, a new way of monitoring current would be a desirable alternative to the conventional manner described above.
What is needed and heretofore unavailable is a high accuracy linear amplifier that is adaptable for use in a DUT power supply and that can minimize distortion and power dissipation. The linear amplifier of the present invention satisfies these needs.
The linear amplifier of the present invention provides high speed voltage and current supply performance to devices-under-test while maintaining stringent accuracy requirements. As a result, semiconductor device manufacturers can maximize device yields and correspondingly reduce test costs.
To realize the foregoing advantages, the invention in one form comprises a high-accuracy linear amplifier for sinking or sourcing current to or from a load. The linear amplifier includes input circuitry for receiving a predetermined input signal and rectifier circuitry. The rectifier circuitry is disposed at the output of the input circuitry and is operative in response to the input signal to generate a source/sink command signal. Output stage circuitry is coupled to the rectifier circuitry and includes a current sink transistor and a current source transistor. The output stage circuitry is responsive to the command signal to sink or source current through one of the respective transistors. The amplifier further includes feedback circuitry coupled between the output of the output stage circuitry and the input circuitry to provide an error signal for modifying the input signal. Bias circuitry maintains the non-conducting transistor in an on state during the sourcing or sinking of current.
In another form, the invention comprises a bias circuit for maintaining a linear amplifier output stage in an on state. The amplifier output stage includes an FET with respective gate, drain, and source terminals and configured as a common-source amplifier. The bias circuit includes a voltage rail, a set resistor coupled to said voltage rail, a current source disposed in series with the set resistor to establish a fixed voltage drop across the set resistor, and a sense resistor disposed between the voltage rail and the FET source terminal. The circuit further includes an op amp having a positive input coupled to the fixed voltage drop, a negative input coupled in a feedback path to the FET source terminal and an output coupled to the FET gate terminal. The op amp cooperates with the current source such that the bias current generated in the FET is independent of drive current, load current and FET heating.
In yet another form, the invention comprises a rectifier circuit for directing a command voltage to source or sink current to or from respective source or sink FET output stage transistors. The rectifier circuit includes a current source path including a current source transistor, a current sink path including a current sink transistor, and op amp circuitry coupled to the paths to establish a common node between the transistors. The respective source and sink transistors operative in response to the command voltage to cause current flow through one of the paths depending on the polarity of the command signal.
In a further form, the invention comprises a modular output stage for use in a linear amplifier. The modular output stage includes respective source current and sink current paths. The paths have respective source and sink transistors disposed in a common-source configuration and respective source and sink impedances to generate a predetermined transconductance. Respective source current and sink current op amps are coupled to the respective source current and sink current transistors. Each of the op amps are responsive to a command signal to source or sink current through the source or sink transistors.
In yet another form, the invention comprises an indirect current monitor circuit for indicating changes in current output from a device-under-test power supply. The power supply includes respective positive and negative voltage rails, at least one output stage, and bias circuitry for biasing the output stage. The indirect current monitor circuit includes a first instrumentation amplifier coupled to the positive bias circuitry and a second instrumentation amplifier coupled to the negative bias circuitry. A summing amplifier having an input coupled to the outputs of the first and second instrumentation amplifiers detects changes in current in the positive and negative bias circuits such that the changes in current in the bias circuits represent changes in current from the at least one output stage.
Other features and advantages of the present invention will be apparent from the following detailed description when read in conjunction with the accompanying drawings.